Ultra Low Capacitance Quad TVS Arrays

PanJit's PJLCDA05 offers TVS protection for gigabit transmission speeds for up to 4 data lines.

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PJLCDA05 -- Protection TVS ESD Arrays

PanJit continues its trend of offering surge and ESD protection for high speed data transmission circuitry by introducing the highly integrated, PJLCDA05. Designed to protect valuable five volt CMOS circuitry, the PJLCDA05 offers significant board space savings. In addition to the PJLCDA05 we will be adding a 12 and 15V version to our portfolio.

Voltage transients or ESD events can harm sensitive logic circuitry or cause latch up. Voltage surges and ESD destroys the gate of CMOS logic by exceeding the CMOS gate voltage rating causing failures to occur. A protection device is often used to limit the voltage applied to the CMOS gate. The protection device must be robust enough to sustain large currents during periods when the device is operating in a voltage clamping mode.

The PJLCDA05 comes in an SOIC8 package and features a max. C (0Vdc, 1Mhz) of 1.2pF as well as leakage current under 5µA! The peak power dissipation is 400W with a 8x20µ sec. surge waveform. The bidirectional configuration has a max. C of 2.4pF. This part is fully compliant with the IEC61000-4-2 standard. Applications include mobile phones, USB 1.1 and 2.0 ports, and 10,100 and 1000 base ethernet port cards.